make ssd driver work

This commit is contained in:
2025-12-14 18:51:52 -06:00
parent a80e918d63
commit 5cde1bdfce
7 changed files with 31 additions and 32 deletions

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@@ -17,9 +17,12 @@ App::App() {
uint32_t App::main() { uint32_t App::main() {
DemoTask demoTask{}; ESP_LOGI(__FILE__, "Running App::main()");
demoTask.start("BlinkTask", 2048, 5, 1); static DemoTask demoTask{};
ESP_LOGI(__FILE__, "Starting DemoTask");
demoTask.start("DemoTask", 4096, 5, 1);
return 1; return 1;
} }

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@@ -15,30 +15,18 @@ DemoTask::DemoTask() {
void DemoTask::run() { void DemoTask::run() {
/* ESP_LOGI(__FILE__, "Demo Task: run()");
ESP_LOGI(TAG, "Example configured to blink GPIO LED!");
gpio_reset_pin(gpio_onboardLed);
gpio_set_direction(gpio_onboardLed, GPIO_MODE_OUTPUT);
while (1) { ssd_595_t dev = { gpio_ssd_data, gpio_ssd_clk, gpio_ssd_latch, true };
ESP_LOGI(TAG, "Turning the LED %s!", ledState == true ? "ON" : "OFF"); SsdInterface ssd(&dev, ssdDigits);
gpio_set_level(gpio_onboardLed, ledState);
ledState = !ledState;
vTaskDelay(blinkTime / portTICK_PERIOD_MS);
}
*/
ESP_LOGI(__FILE__, "Demo Task");
SsdInterface ssd(gpio_ssd_data, gpio_ssd_clk, gpio_ssd_latch, ssdDigits);
uint32_t delay = 500; // ms uint32_t delay = 500; // ms
uint8_t byte = 0x00; uint8_t digit = 0;
while(1) { while(1) {
ESP_LOGI(__FILE__, "Shifting out byte %02hhx", byte); ssd.writeRaw(&digitMap[digit], 1);
digit++;
ssd.writeRaw(&byte, 1); if(digit >= 16) digit = 0;
byte++;
vTaskDelay(delay / portTICK_PERIOD_MS); vTaskDelay(delay / portTICK_PERIOD_MS);
} }

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@@ -1,11 +1,9 @@
#include "SsdInterface.hpp" #include "SsdInterface.hpp"
SsdInterface::SsdInterface(const uint8_t dataPin, const uint8_t clockPin, const uint8_t latchPin, size_t numDigits) : numDigits_(numDigits) { SsdInterface::SsdInterface(const ssd_595_t* device, size_t numDigits) : device_(device), numDigits_(numDigits) {
// create device shiftInit(device_);
static ssd_595_t dev = { (gpio_num_t)dataPin, (gpio_num_t)clockPin, (gpio_num_t)latchPin };
device_ = &dev;
} }

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@@ -10,7 +10,7 @@ class SsdInterface {
public: public:
SsdInterface(const uint8_t dataPin, const uint8_t clockPin, const uint8_t latchPinPin, size_t numDigits); SsdInterface(const ssd_595_t* device, size_t numDigits);
~SsdInterface() = default; ~SsdInterface() = default;
// Outputs the data straight to hardware, mostly for testing purposes // Outputs the data straight to hardware, mostly for testing purposes
@@ -35,7 +35,7 @@ public:
private: private:
ssd_595_t* device_; const ssd_595_t* device_;
size_t numDigits_; // number of chained digits size_t numDigits_; // number of chained digits
uint8_t* data_; // pointer to the data written uint8_t* data_; // pointer to the data written

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@@ -1,6 +1,8 @@
#include "TaskBase.hpp" #include "TaskBase.hpp"
#include "esp_log.h"
void TaskBase::start(const char* name, uint32_t stackSize, UBaseType_t priority, BaseType_t core) { void TaskBase::start(const char* name, uint32_t stackSize, UBaseType_t priority, BaseType_t core) {
xTaskCreatePinnedToCore(&TaskBase::taskEntryPoint, name, stackSize, this, priority, &handle, core); xTaskCreatePinnedToCore(&TaskBase::taskEntryPoint, name, stackSize, this, priority, &handle, core);
return; return;

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@@ -2,6 +2,7 @@
#include "ssd.h" #include "ssd.h"
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
#include "esp_log.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@@ -9,23 +10,28 @@ extern "C" {
inline void pulse(gpio_num_t pin) { inline void pulse(gpio_num_t pin) {
gpio_set_level(pin, 1); gpio_set_level(pin, 1);
esp_rom_delay_us(1);
gpio_set_level(pin, 0); gpio_set_level(pin, 0);
esp_rom_delay_us(1);
} }
void shiftInit(const ssd_595_t* device) { void shiftInit(const ssd_595_t* device) {
gpio_reset_pin(device->dataPin);
gpio_reset_pin(device->clockPin);
gpio_reset_pin(device->latchPin);
gpio_config_t ioConfig = { gpio_config_t ioConfig = {
.mode = GPIO_MODE_OUTPUT, .mode = GPIO_MODE_OUTPUT,
.pin_bit_mask = (1ULL << device->dataPin) | .pin_bit_mask = (1ULL << device->dataPin) |
(1ULL << device->clockPin) | (1ULL << device->clockPin) |
(1ULL << device->latchPin) (1ULL << device->latchPin),
}; };
gpio_config(&ioConfig); gpio_config(&ioConfig);
gpio_set_level(device->dataPin, 0); gpio_set_level(device->dataPin, 0);
gpio_set_level(device->clockPin, 0); gpio_set_level(device->clockPin, 0);
gpio_set_level(device->latchPin, 0); gpio_set_level(device->latchPin, 0);
ESP_LOGI(__FILE__, "ssd_595 initialized");
} }
void addDecimal(uint8_t* data) { void addDecimal(uint8_t* data) {
@@ -34,8 +40,9 @@ void addDecimal(uint8_t* data) {
} }
void shiftByte(const ssd_595_t* device, uint8_t byte) { void shiftByte(const ssd_595_t* device, uint8_t byte) {
for(int i = 0; i < __CHAR_BIT__; i++) { for(int i = 0; i < __CHAR_BIT__ ; i++) {
gpio_set_level(device->dataPin, (byte >> i) & 0x1); uint32_t level = ((byte >> i) & 0x1) ^ device->commonCathode;
gpio_set_level(device->dataPin, level);
pulse(device->clockPin); pulse(device->clockPin);
} }
pulse(device->latchPin); pulse(device->latchPin);

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@@ -14,6 +14,7 @@ typedef struct {
gpio_num_t dataPin; gpio_num_t dataPin;
gpio_num_t clockPin; gpio_num_t clockPin;
gpio_num_t latchPin; gpio_num_t latchPin;
bool commonCathode; // false = common anode
} ssd_595_t; } ssd_595_t;
// encoding of digits on the seven segment display // encoding of digits on the seven segment display